Introduction to Instruction Set Architectures
Instruction Formats are the binary patterns that represent machine instructions. An instruction format is composed of fields that represent the opcode, the operands, the addressing mode, and other features of the instruction. The opcode specifies the operation to be performed, while the operands specify the data on which the operation is to be performed. The addressing mode specifies how the operands are to be accessed.
Addressing Modes determine the way in which memory is accessed by the instructions. The addressing mode is a field in the instruction format that specifies how the operand is to be interpreted. Commonly used addressing modes include:
In the immediate addressing mode, the operand is specified directly in the instruction. In the direct addressing mode, the operand is the contents of a memory location specified in the instruction. In the indirect addressing mode, the operand is the contents of a memory location whose address is specified in the instruction. In the indexed addressing mode, the operand is the contents of a memory location whose address is the sum of a base address and an offset. In the based addressing mode, the operand is the contents of a memory location whose address is the sum of a base register and an offset. In the relative addressing mode, the operand is a displacement relative to the program counter.
For example, consider an instruction in the x86 architecture:
MOV AL, [BX+SI+10H]
Here, MOV is the opcode, AL is the destination operand, and [BX+SI+10H] is the source operand. The addressing mode used here is based addressing, in which the operand is the contents of a memory location whose address is the sum of the BX register, the SI register, and the immediate offset 10H.
Another example of instruction formats is the RISC-V architecture which uses a fixed-length instruction format of 32 bits. The instruction format is divided into several fields, such as opcode, rd, rs1, rs2, funct3, funct7, imm, and others. The opcode field specifies the major operation to be performed by the instruction, while the rd, rs1, and rs2 fields specify the destination register, source register 1, and source register 2, respectively. The funct3 and funct7 fields are used to further specify the operation. The imm field is used to specify an immediate operand in the instruction.
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